Deadlock-free and plane-balanced adaptive routing for 3D networks-on-chip
暂无分享,去创建一个
[1] Lorena Anghel,et al. Message routing in 3D networks-on-chip , 2009, 2009 NORCHIP.
[2] Bart Swinnen,et al. 3D System Integration Technologies , 2007, ICICDT 2007.
[3] Chi-Sang Poon,et al. A CMOS Current-Mode Dynamic Programming Circuit , 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.
[4] Luca Benini,et al. Networks on Chips : A New SoC Paradigm , 2022 .
[5] Wayne Luk,et al. Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network , 2011, IEEE Transactions on Industrial Electronics.
[6] Jian-Qiang Lu,et al. 3 D Integration : Why , What , Who , When ? SECTION 1 , .
[7] Ge-Ming Chiu,et al. The Odd-Even Turn Model for Adaptive Routing , 2000, IEEE Trans. Parallel Distributed Syst..
[8] Jie Wu,et al. A simple fault-tolerant adaptive and minimal routing approach in 3-D meshes , 2008, Journal of Computer Science and Technology.
[9] Antonio Robles,et al. A Fully Adaptive Fault-Tolerant Routing Methodology Based on Intermediate Nodes , 2004, NPC.