A V-band low-noise amplifier with 5.3-dB NF and over 8-kV ESD protection in 65-nm RF CMOS

This paper presents an ESD-protected V-band (f0 at 58 GHz) low-noise amplifier (LNA) in 65-nm CMOS. Instead of using the conventional diode-based RF ESD design, a high current capability spiral inductor and a high breakdown MOM capacitor are employed as effective bi-directional ESD protection network, and also as part of the input matching by the co-design approach. The measured results demonstrate an over 8-kV HBM ESD protection level with a NF of 5.3 dB and a power gain of 17.5 dB at 58 GHz, under a power consumption of 18 mW. To our best knowledge, this LNA presents a highest ESD protection level and a lowest NF, compared with prior arts in a similar frequency range.

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