Verification-based learning: a generalisation strategy for inferring problem-reduction methods

A major impediment to the development of high-performance knowledge-based systems arises from the prohibitive effort involved in equipping these systems with a sufficient set of problem-solving methods. Thus, one important research problem in Machine Learning has been the study of techniques for inferring problem-solving methods from examples. Although a number of techniques for learning problem-solving methods have been described in the literature, all of them assume a state-space model of problem-solving. In this paper we describe a new technique for learning problem-reduction methods, Verification-Based Learning (VBL), which extends the earlier techniques to the problem-reduction formulation of problem-solving. We illustrate the VBL technique with examples drawn from circuit design and symbolic integration.