An 11-bit 250-nW 10-kS/s SAR ADC with doubled input range for biomedical applications

This paper presents a low power, area efficient 11bit single-ended successive-approximation-register (SAR) analog-to-digital converter (ADC) with small loading effect targeted for biomedical applications. The design features an energy-efficient switching technique with an error cancelling capacitor network to cover an input range twice the reference voltage. The ADC's loading effect to previous stage is reduced by using single-ended structure and eliminating the largest capacitor in switching network. The common-mode voltage of the input signal, generated by other blocks, can be used as reference voltage. All building blocks were designed in subthreshold for power efficiency, with asynchronous self-controlled SAR logic. The ADC was fabricated in a 0.18 μm CMOS 2P4M process. The measured peak SNDR was 60.5 dB, the SFDR was 72 dB, the DNL +0.6/−0.37 LSB and the INL +0.94/−0.89 LSB. The total power consumption was 250 nW from a 0.75 V supply voltage.

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