Reconfigurable Parallel Architecture for Genetic Algorithms: Application to the Synthesis of Digital Circuits

This work presents a proposal and implementation of a re-configurable parallel architecture, using Genetic Algorithms and applied to synthesis of combinational digital circuits. This reconfigurable parallel architecture uses concepts of computer architecture and parallel processing to obtain a scalable performance. It is developed in VHDL and implemented totally in hardware using FPGA devices. The concept of reconfigurable and parallel architecture enables an easy hardware adaptation to different project requirements. This approach allows applies with flexibility different strategies to synthesis of combinational digital circuits problem.

[1]  Vincent P. Heuring,et al.  Principles of Computer Architecture , 1999 .

[2]  Takuji Nishimura,et al.  Mersenne twister: a 623-dimensionally equidistributed uniform pseudo-random number generator , 1998, TOMC.

[3]  Reiner W. Hartenstein,et al.  A decade of reconfigurable computing: a visionary retrospective , 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

[4]  Brent E. Nelson,et al.  A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2 , 1995, FPL.

[5]  Goldberg,et al.  Genetic algorithms , 1993, Robust Control Systems with Genetic Algorithms.

[6]  Erick Cantú-Paz,et al.  Efficient and Accurate Parallel Genetic Algorithms , 2000, Genetic Algorithms and Evolutionary Computation.

[7]  David J. Lilja,et al.  Designing Multiprocessor Scheduling Algorithms Using a Distributed Genetic Algorithm System , 1997 .

[8]  Yang Zhang,et al.  Digital circuit design using intrinsic evolvable hardware , 2004, Proceedings. 2004 NASA/DoD Conference on Evolvable Hardware, 2004..

[9]  Lukás Sekanina,et al.  Easily testable image operators: the class of circuits where evolution beats engineers , 2003, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..

[10]  Jack Dongarra,et al.  Sourcebook of parallel computing , 2003 .

[11]  Wolfgang Rosenstiel,et al.  New Algorithms, Architectures and Applications for Reconfigurable Computing , 2005 .

[12]  John H. Holland,et al.  Adaptation in Natural and Artificial Systems: An Introductory Analysis with Applications to Biology, Control, and Artificial Intelligence , 1992 .

[13]  Julian Francis Miller,et al.  Cartesian genetic programming , 2000, GECCO '10.

[14]  David E. Goldberg,et al.  Genetic Algorithms in Search Optimization and Machine Learning , 1988 .

[15]  Carlos A. Coello Coello,et al.  On the use of a population-based particle swarm optimizer to design combinational logic circuits , 2004, Proceedings. 2004 NASA/DoD Conference on Evolvable Hardware, 2004..

[16]  Maya Gokhale,et al.  Reconfigurable Computing: Accelerating Computation with Field-Programmable Gate Arrays , 2005 .

[17]  Carlos A. Coello Coello,et al.  Use of Particle Swarm Optimization to Design Combinational Logic Circuits , 2003, ICES.

[18]  Volnei A. Pedroni.  Circuit Design with VHDL , 2004 .