Modeling and verification of cache coherence protocols
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[1] Ganesh Gopalakrishnan,et al. A new partial order reduction algorithm for concurrent system verification , 1997 .
[2] Doron A. Peled,et al. Combining partial order reductions with on-the-fly model-checking , 1994, Formal Methods Syst. Des..
[3] Glynn Winskel,et al. Petri Nets, Event Structures and Domains , 1979, Semantics of Concurrent Computation.
[4] Robert P. Kurshan,et al. Computer-Aided Verification of Coordinating Processes: The Automata-Theoretic Approach , 2014 .
[5] William Stallings. Computer Organization and Architecture , 2002 .
[6] Glynn Winskel,et al. Petri Nets, Event Structures and Domains, Part I , 1981, Theor. Comput. Sci..
[7] Kenneth L. McMillan,et al. Symbolic model checking , 1992 .
[8] R. Nunna,et al. Modeling and verification of iterated systems and protocols , 2001, Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257).
[9] L. Ivanov,et al. Formal Verification of Globally-Iterated/Locally-Non-Iterated Systems , 1999 .
[10] L. Ivanov,et al. Formal verification: a new partial order approach , 1999, Twelfth Annual IEEE International ASIC/SOC Conference (Cat. No.99TH8454).
[11] Patrice Godefroid,et al. Partial-Order Methods for the Verification of Concurrent Systems , 1996, Lecture Notes in Computer Science.
[12] Michael J. Flynn,et al. Computer Organization and Architecture , 1978, Advanced Course: Operating Systems.
[13] Zoltán Ésik,et al. Free Shuffle Algebras in Language Varieties , 1996, Theor. Comput. Sci..
[14] L. Ivanov,et al. Modeling and analysis of noniterated systems: an approach based upon series-parallel posets , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).