VLSI architectures for associative networks

The authors describe the basic design principles behind a Si integrated circuit implementation of associative networks (ANs). These principles are illustrated by a special VLSI design combining analog and digital CMOS technology. The importance of close interaction of system design and technology, resulting in a VLSI concept functionally optimized in many respects, is pointed out. In this context, on-chip analog circuit techniques are presented to implement necessary correlation and threshold operations of the AN processing units. They also discuss the memory cells, and, in particular a nonvolatile adaptive memory cell. The proposed cell takes advantage of the floating-gate transistor principle in which a threshold voltage can be set continuously over a range of value representing the analog coupling strength of connected processing units.<<ETX>>