Optimal design of bus converter in on-board distributed power architecture

The power supply system which requires the low-voltage / high-current output has been changing from conventional centralized power system to distributed power system. The distributed power system consists of bus converter and POL. The most important factor is the system stability in bus architecture design. The overlap between the output impedance of bus converter and input impedance of POL causes system instability, and it has been an actual problem. Increasing the bus capacitor, system stability can be reduced easily. However, due to the limited space on the system board, increasing of bus capacitors is impractical. The urgent solution of the issue is desired strongly. This paper presents the output impedance design for on-board distributed power system by means of three control schemes of bus converter. The output impedance peak of the bus converter and the input impedance of the POL are analyzed, and it is conformed by experimentally for stability criterion. Furthermore, the design process of each control schemes for system stability is proposed.

[1]  Dong-Kurl Kwak,et al.  A study on novel buck-boost AC-DC converter of high performance by partial resonance technique , 2007, 2007 7th Internatonal Conference on Power Electronics.

[2]  F.C. Lee,et al.  An output impedance-based design of voltage regulator output capacitors for high slew-rate load current transients , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[3]  Fred C. Lee,et al.  On-line measurement on stability margin of DC distributed power system , 2000, APEC 2000. Fifteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.00CH37058).

[4]  R. D. Middlebrook,et al.  Input filter considerations in design and application of switching regulators. , 1976 .

[5]  Fred C. Lee,et al.  Individual load impedance specification for a stable DC distributed power system , 1999, APEC '99. Fourteenth Annual Applied Power Electronics Conference and Exposition. 1999 Conference Proceedings (Cat. No.99CH36285).

[6]  Tamotsu Ninomiya,et al.  Stability design of bus converter following by POLs in distributed power system , 2004, Circuits, Signals, and Systems.

[7]  M. Hirokawa,et al.  System Stability of Full-Regulated Bus Converter in Distributed Power System , 2005, INTELEC 05 - Twenty-Seventh International Telecommunications Conference.

[8]  M. Hirokawa,et al.  Stability Comparison of Three Control Schemes for Bus Converter in Distributed Power System , 2005, 2005 International Conference on Power Electronics and Drives Systems.

[9]  F.C. Lee,et al.  Two-stage approach for 12 V VR , 2004, Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04..

[10]  Tamotsu Ninomiya,et al.  Stability design consideration for on-board distributed power system consisting of full-regulated bus converter and POLs , 2006 .

[11]  J. Wanes,et al.  Analyzing and determining optimum on-board power architectures for 48 V-input systems , 2003, Eighteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2003. APEC '03..

[12]  Slobodan Cuk,et al.  A general unified approach to modelling switching-converter power stages , 1977 .

[13]  T. Ninomiya,et al.  A unified analysis of resonant converters , 1991 .

[14]  Fred C. Lee,et al.  A method of defining the load impedance specification for a stable distributed power system , 1993 .

[15]  F.C. Lee,et al.  Two-stage approach for 12-V VR , 2004, IEEE Transactions on Power Electronics.

[16]  M. Hirokawa,et al.  Stability improvement of distributed power system by using full-regulated bus converter , 2005, 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005..