High Performance Chip-Partitioned Millimeter Wave Passive Devices on Smooth and Fine Pitch InFO RDL

High performance millimeter wave passive devices are realized on smooth, fine pitch InFO redistribution layer (RDL). These passive devices are balun, power combiner, coupler, and microstrip line and the electrical performances are measured from 0.1GHz to 67 GHz through VNA. The measurement results show that the transmission loss of on-InFO balun (4.3 dB), the power divider (4.3 dB), and the coupler (4.9 dB) outperforms on-chip one by 2.1 dB, 1 dB, and 0.2 dB, respectively. While the transmission loss of microstrip line (0.34 dB/mm) is better than on-chip one by 0.17 dB/mm at 60 GHz. Furthermore, the parasitic of InFO chip-package interconnection has been investigated and compared to other technologies with and without solder bumps. The parasitic resistance, inductance, and capacitance for InFO interconnection are 75 %, 76 %, and 14 % lower than those for chip-last, face-down technology. Parasitic resistance for InFO RDL is 10 % lower than that for chip-first face-down technology with uneven RDL.

[1]  Douglas Yu,et al.  InFO (Wafer Level Integrated Fan-Out) Technology , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[2]  R. Weigel,et al.  Embedded wafer level ball grid array (eWLB) technology for millimeter-wave applications , 2011, 2011 IEEE 13th Electronics Packaging Technology Conference.

[3]  V. Sundaram,et al.  Chip-last embedded actives and passives in thin organic package for 1–110 GHz multi-band applications , 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

[4]  Chewn-Pu Jou,et al.  High-performance integrated fan-out wafer level packaging (InFO-WLP): Technology and system integration , 2012, 2012 International Electron Devices Meeting.

[5]  Chuei-Tang Wang,et al.  Power saving and noise reduction of 28nm CMOS RF system integration using integrated fan-out wafer level packaging (InFO-WLP) technology , 2015, 2015 International 3D Systems Integration Conference (3DIC).

[6]  Douglas Yu A new integration technology platform: Integrated fan-out wafer-level-packaging for mobile applications , 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

[7]  Chuei-Tang Wang,et al.  Signal and Power Integrity Analysis on Integrated Fan-Out PoP (InFO_PoP) Technology for Next Generation Mobile Applications , 2016, 2016 IEEE 66th Electronic Components and Technology Conference (ECTC).

[8]  Chung-Hao Tsai,et al.  Array antenna integrated fan-out wafer level packaging (InFO-WLP) for millimeter wave system applications , 2013, 2013 IEEE International Electron Devices Meeting.

[9]  Changzhi Li,et al.  A mm-Wave Stub-Loaded ECPW Wilkinson Power Divider/Combiner in 90 nm CMOS , 2012, IEEE Microwave and Wireless Components Letters.

[10]  Paragkumar Thadesar,et al.  Fabrication and Characterization of Polymer-Enhanced TSVs, Inductors, and Antennas for Mixed-Signal Silicon Interposer Platforms , 2016, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[11]  G. Knoblinger,et al.  High-$Q$ Inductors Embedded in the Fan-Out Area of an eWLB , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.

[12]  C.-Y. Hsu,et al.  A 60-GHz Millimeter-wave CMOS Marchand Balun , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[13]  Curtis Zwenger,et al.  Silicon Wafer Integrated Fan-out Technology , 2015 .

[14]  K. Hettak,et al.  A novel compact three-dimensional CMOS branch-line coupler using the meandering ECPW, TFMS, and buried micro coaxial technologies at 60 GHz , 2010, 2010 IEEE MTT-S International Microwave Symposium.

[15]  Da-Chiang Chang,et al.  Compact 60-GHz IPD-Based Branch-Line Coupler for System-on-Package V-Band Radios , 2012, IEEE Transactions on Components, Packaging and Manufacturing Technology.