The design of a Ka-band two-stage monolithic low noise amplifier

A Ka-band two-stage monolithic low noise amplifier has been designed using a commercial 0.18-/spl mu/m pseudomorphic high electron-mobility transistor (pHEMT) process. The gate widths of FETs and source inductors are adjusted to achieve best tradeoff among gain, noise figure and return loss. The simulated results of the low noise amplifier chip show a gain of more than 11 dB, a noise figure of less than 2 dB, an input return loss of greater than 15 dB, and an output return loss of greater than 9.7 dB in the frequency range of 27 to 33 GHz. The chip size is 1.4/spl times/0.9 mm/sup 2/.

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