A module generator for high-speed CMOS current output digital/analog converters

A module generator (DSYN) creates optimized digital/analog converter (DAC) layouts given a set of specifications including performance constraints, a description of the implementation technology, and a set of design parameters. The generation process consists of a synthesis step followed by a layout step. During synthesis, a new constrained optimization method is coupled with combination of circuit simulation and DAC design equations. The layout step uses stretching and tiling operations on a set of primitive cells. Prototypes have been demonstrated for an 8-b, 100-MS/s specification, driving a 37.5-ohm video load, and a static 10-b specification, driving a 4 mA full-scale output current. Both designs use a 5-V supply in a 1.2 /spl mu/m CMOS process.

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