$Q2SHQ*/(6'*UDSKLFV6R&ZLWK9HUVDWLOH+:6: 'HYHORSPHQW6XSSRUW

Abstract— A multi-threaded programmable shader pipeline 3D graphics SoC with support for OpenGL ES 2.0 has been developed and fabricated. The sample chip is ARMv4T compatible with the 3D processing capability of 14.9 Mvertices/s, 3.6 Mpixels/s and up to 4K resolution. The die size is 3.85x3.85 mm 2 , with 2.96M gates on a TSMC 90nm CMOS 1P9M. This new SoC includes software to support OpenGL ES API libraries, GLSL compilation and simulation. The SoC also comes with various development tools, including GPU simulators for hardware validation, profile assisted compiler optimization and compiler verification. For developers, we also present a QEMUbased simulation platform and SoC Performance Monitoring Tool Suite (PMTS) to assist developers in optimizing the system and detecting performance bottlenecks.

[1]  Shiann-Rong Kuang,et al.  Efficient architecture and hardware implementation of hybrid fuzzy-Kalman filter for workload prediction , 2014, Integr..

[2]  Shau-Yin Tseng,et al.  A performance monitoring tool suite for 3D graphics SoC application , 2012, 2012 IEEE Asia Pacific Conference on Circuits and Systems.

[3]  Shen-Fu Hsiao,et al.  Low latency design of Depth-Image-Based Rendering using hybrid warping and hole-filling , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[4]  Daniel Gajski,et al.  Transaction level modeling: an overview , 2003, First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721).

[5]  Carlos González,et al.  ATTILA: a cycle-level execution-driven simulator for modern GPU architectures , 2006, 2006 IEEE International Symposium on Performance Analysis of Systems and Software.

[6]  Ing-Jer Huang,et al.  An 8.69 Mvertices/s 278 Mpixels/s tile-based 3d graphics full pipeline with embedded performance counting module, real-time bus tracer and protocol checker for consumer electronics , 2008, 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT).