A Web-based interactive adviser for assembly line balancing

A method for fabricating a semiconductor device of the present invention comprises steps of forming a first oxide layer on a semiconductor substrate comprising a memory cell unit and an input/output circuit unit, removing selectively the first oxide layer on the memory cell unit, forming a photoresist layer on the first oxide layer on the input/output circuit unit and the semiconductor substrate of the memory cell unit, forming openings on regions where gate electrodes will be formed by patterning the photoresist layer, forming oxygen containing layers by implanting the oxygen ion in the semiconductor substrate on the memory cell unit and the first oxide layer of the input/out circuit unit through the openings, removing the photoresist layer, forming a trench inside of the semiconductor substrate on the memory cell unit by removing the oxygen containing layer formed in the semiconductor substrate, etching the first oxide layer as a certain thickness, forming the gate electrodes on the upper surface of the first oxide layer on the input/output circuit unit and the trench on the memory cell unit, forming impurity regions by implanting the impurity ions into the semiconductor substrate at the both sides of the gate electrode, forming sidewall spacers on the both sides of the gate electrodes, and forming the source/drain region by implanting the impurity ions into the semiconductor substrate by using the sidewall spacers as a mask.