Formal verification and testing of protocols
暂无分享,去创建一个
[1] Amir Pnueli,et al. Applications of Temporal Logic to the Specification and Verification of Reactive Systems: A Survey of Current Trends , 1986, Current Trends in Concurrency.
[2] Jean Arlat,et al. Fault injection for formal testing of fault tolerance , 1996, IEEE Trans. Reliab..
[3] Edmund M. Clarke,et al. Design and Synthesis of Synchronization Skeletons Using Branching-Time Temporal Logic , 1981, Logic of Programs.
[4] Joseph Y. Halpern,et al. “Sometimes” and “not never” revisited: on branching versus linear time temporal logic , 1986, JACM.
[5] Tadao Murata,et al. Hierarchical Reachability Graph of Bounded Petri Nets for Concurrent-Software Analysis , 1994, IEEE Trans. Software Eng..
[6] Somesh Jha,et al. Verification of the Futurebus+ cache coherence protocol , 1993, Formal Methods Syst. Des..
[7] Daniel Y. Chao,et al. An interactive tool for design, simulation, verification, and synthesis of protocols , 1994, Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems.
[8] Richard Gerber,et al. Compiling Real-Time Programs With Timing Constraint Refinement and Structural Code Motion , 1995, IEEE Trans. Software Eng..
[9] Jean Arlat,et al. Fault injection for the formal testing of fault tolerance , 1992, [1992] Digest of Papers. FTCS-22: The Twenty-Second International Symposium on Fault-Tolerant Computing.
[10] Jonathan S. Ostroff,et al. Deciding Properties of Timed Transition Models , 1990, IEEE Trans. Parallel Distributed Syst..
[11] Dimiter R. Avresky,et al. A MULTI-STAGED SOFTWARE DESIGN APPROACH FOR FAULT TOLERANCE , 1994 .
[12] I. Bey,et al. Delta-4: A Generic Architecture for Dependable Distributed Computing , 1991, Research Reports ESPRIT.
[13] Daniel Y. Chao,et al. An interactive tool for design, simulation, verification, and synthesis of protocols , 1994, Softw. Pract. Exp..