A CMOS voltage reference using compensation of mobility and threshold voltage temperature effects

A CMOS voltage reference using compensation of mobility and threshold voltage temperature effects is proposed. In this reference, the nested connection of two NMOS transistors supplies a voltage with positive temperature coefficient, and the diode-connected NMOS transistor supplies a voltage with negative temperature coefficient. These two circuits are connected in series via an operational amplifier, and the resulting voltage that appears in the output stage of this amplifier has low temperature coefficient. The calculations are verified by simulations of the reference designed in 0.13 µm CMOS technology. The simulated reference provides a voltage of about 490 mV with the variation of 1 mV in the temperature range 20 to 120°C. The reference is able to operate with sub-1V power supplies.

[1]  G. Iannaccone,et al.  A Sub-1 V, 10 ppm/°C, Nanopower Voltage Reference Generator , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

[2]  Dongsheng Ma,et al.  A Sub-1-V Low-Noise Bandgap Voltage Reference , 2007, IEEE J. Solid State Circuits.

[3]  Igor M. Filanovsky,et al.  Circuit Techniques for Operational Amplifier Speed and Accuracy Improvement , 2007, 2007 14th IEEE International Conference on Electronics, Circuits and Systems.

[4]  Igor M. Filanovsky,et al.  Simple CMOS analog square-rooting and squaring circuits , 1992 .

[5]  Igor M. Filanovsky,et al.  Operational Amplifier Speed and Accuracy Improvement: Analog Circuit Design With Structural Methodology (KLUWER INTERNATIONAL SERIES IN ENGINEERING AND COMPUTER SCIENCE) , 2004 .

[6]  David A. Johns,et al.  Analog Integrated Circuit Design , 1996 .

[7]  Laleh Najafizadeh,et al.  A simple voltage reference using transistor with ZTC point and PTAT current source , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[8]  Dongsheng Ma,et al.  A Sub-1-V Low-Noise Bandgap Voltage Reference , 2007, IEEE Journal of Solid-State Circuits.

[9]  I. Filanovsky,et al.  Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits , 2001 .

[10]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[11]  Giuseppe de Vita,et al.  A Sub-1-V, 10 ppm/ $^{\circ}$C, Nanopower Voltage Reference Generator , 2007, IEEE Journal of Solid-State Circuits.

[12]  Laleh Najafizadeh,et al.  Towards a sub-1 V CMOS voltage reference , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[13]  Z.M. Lin,et al.  An Ultra-Low Temperature-Coefficient CMOS Voltage Reference , 2007, 2007 IEEE Conference on Electron Devices and Solid-State Circuits.