Selective silicon epitaxial growth for device-isolation

[1]  B. D. Joyce,et al.  Selective Epitaxial Deposition of Silicon , 1962, Nature.

[2]  S. Mendelson.  Stacking Fault Nucleation in Epitaxial Silicon on Variously Oriented Silicon Substrates , 1964 .

[3]  G. Booker.  Crystallographic imperfections in silicon , 1964 .

[4]  S. Tung.  The Effects of Substrate Orientation on Epitaxial Growth , 1965 .

[5]  W. Oldham,et al.  The Growth and Etching of Si through Windows in SiO2 , 1967 .

[6]  THE ``EPICON'' ARRAY: A NEW SEMICONDUCTOR ARRAY‐TYPE CAMERA TUBE STRUCTURE , 1970 .

[7]  H. Ogawa,et al.  The Selective Epitaxial Growth of Silicon by Using Silicon Nitride Film as a Mask , 1971 .

[8]  D. Schroder,et al.  Selective Growth of Epitaxial Silicon and Gallium Arsenide , 1971 .

[9]  D. Dumin.  Selective epitaxy using silane and germane , 1971 .

[10]  D. Schroder,et al.  Selective Silicon Epitaxy and Orientation Dependence of Growth , 1973 .

[11]  R. Smeltzer.  Epitaxial Deposition of Silicon in Deep Grooves , 1975 .

[12]  R. Gessner,et al.  SELECTIVE ETCHING AND EPITAXIAL REFILLING OF SILICON WELLS IN THE SYSTEM SiH4/HCl/H2 , 1975 .

[13]  W. N. Grant,et al.  Elimination of latch up in bulk CMOS , 1980, 1980 International Electron Devices Meeting.

[14]  K. Bean.  Chemical vapor deposition applications in microelectronics processing , 1981 .

[15]  C.C. Huang,et al.  Characterization of CMOS latch-up , 1982, 1982 International Electron Devices Meeting.

[16]  R. Rung,et al.  Deep trench isolated CMOS devices , 1982, 1982 International Electron Devices Meeting.

[17]  S. Kayano,et al.  A New Isolation Technology for Bipolar Devices by Low Pressure Selective Silicon Epitaxy , 1982, 1982 Symposium on VLSI Technology. Digest of Technical Papers.

[18]  T. Mizutani,et al.  Suppression of extraneous wall deposition by HCl injection in hydride vapor phase epitaxy of III–V semiconductors , 1982 .

[19]  N. Endo,et al.  Selective Silicon Epitaxy Using Reduced Pressure Technique , 1982 .

[20]  L.K. Wang,et al.  Twin-Tub CMOS II-An advanced VLSI technology , 1982, 1982 International Electron Devices Meeting.

[21]  Robert W. Dutton,et al.  Modeling Latch-Up in CMOS Integrated Circuits , 1982, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[22]  M. Ghezzo,et al.  Reduced geometry CMOS technology , 1982, 1982 International Electron Devices Meeting.

[23]  High-density and reduced latchup susceptibility CMOS technology for VLSI , 1983, IEEE Electron Device Letters.

[24]  L. Jastrzebski,et al.  Growth Process of Silicon Over SiO2 by CVD: Epitaxial Lateral Overgrowth Technique , 1983 .

[25]  N. Endo,et al.  Crystalline Defects in Selectively Epitaxial Silicon Layers , 1983 .

[26]  N. Endo,et al.  CMOS technology using SEG isolation technique , 1983, 1983 International Electron Devices Meeting.

[27]  W. Engl,et al.  Selective low-pressure silicon epitaxy for MOS and bipolar transistor application , 1983, IEEE Transactions on Electron Devices.

[28]  N. Endo,et al.  Local Loading Effect in Selective Silicon Epitaxy , 1984 .

[29]  H. M. Liaw,et al.  Epitaxial silicon for bipolar integrated circuits , 1984 .

[30]  Akihiko Ishitani,et al.  Impurity profile measurement using VT-VSB characteristics , 1984 .