论文信息 - A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz

A 3-V 5.4-mW BiCMOS track & hold circuit with sampling frequency up to 150 MHz

A track & hold circuit to be used in front of a high-speed analog-to-digital converter (ADC) is proposed. In order to achieve the required resolution with a single 3-V supply, a fully differential closed-loop architecture is used. The track & hold circuit processes a differential 1-Vpp output signal swing and achieves more than 8-b linearity with sampling frequency up to 150 MHz. In these conditions, the total power consumption is 5.4 mW from a single 3-V supply. The circuit has been realized in a 0.7 /spl mu/m BiCMOS technology, and its active area is about 0.15 mm/sup 2/.

Andrea Baschirotto | Rinaldo Castello | L. Schillaci

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