Characterization of the quantization properties of similarity-related DSP structures by means of interval simulations

This paper presents a novel approach for the evaluation of the finite word-length performance of DSP structures. Realizations are simulated using interval arithmetic with support for feedback loops, thus allowing fast characterization of the overflow behavior and the quantization effects. When this technique is applied to unquantized and quantized filter realizations (linear case), previously obtained results, such as the improved performance of the normal form, are readily confirmed. When this technique is applied to nonlinear systems, it can be used to quantitatively measure the quantization effects and to provide guaranteed bounds for all signals, thus limiting the maximum amplitudes of possible limit cycles.

[1]  Octavio Nieto-Taladriz,et al.  Bit-width selection for data-path implementations , 1999, Proceedings 12th International Symposium on System Synthesis.

[2]  Earl E. Swartzlander,et al.  A Family of Variable-Precision Interval Arithmetic Processors , 2000, IEEE Trans. Computers.

[3]  J.B.G. Roberts,et al.  Digital signal processing in the UK , 1987 .

[4]  Seehyun Kim,et al.  Fixed-point optimization utility for C and C++ based digital signal processing programs , 1998 .

[5]  L. Jackson.  Roundoff-noise analysis for fixed-point digital filters realized in cascade or parallel form , 1970 .

[6]  Eero Hyvönen,et al.  Interval approach challenges Monte Carlo simulation , 1996, Reliab. Comput..

[7]  Peter H. Bauer,et al.  A computer-aided test for the absence of limit cycles in fixed-point digital filters , 1991, IEEE Trans. Signal Process..

[8]  Seehyun Kim,et al.  Fixed-point optimization utility for C and C++ based digital signal processing programs , 1995, VLSI Signal Processing, VIII.

[9]  Octavio Nieto-Taladriz,et al.  Fast characterization of the noise bounds derived from coefficient and signal quantization , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[10]  Heinrich Meyr,et al.  System level fixed-point design based on an interpolative approach , 1997, DAC.

[11]  C. Barnes,et al.  Minimum norm recursive digital filters that are free of overflow limit cycles , 1977 .

[12]  A. Michel,et al.  Stability analysis of fixed- point digital filters using computer generated Lyapunov functions- Part I: Direct form and coupled form filters , 1985 .

[13]  Rob A. Rutenbar,et al.  Floating-point error analysis based on affine arithmetic , 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

[14]  J.A. Lopez,et al.  Prototyping design of a transceiver for the new double bitrate DECT , 2001, Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257).

[15]  Arnold Neumaier,et al.  Taylor Forms—Use and Limits , 2003, Reliab. Comput..

[16]  Patrick Schaumont,et al.  A methodology and design environment for DSP ASIC fixed point refinement , 1999, DATE '99.

[17]  De Figueiredo,et al.  Self-validated numerical methods and applications , 1997 .