Method and for circuit controlling isolation gates of semiconductor memory device

PURPOSE: A method for controlling isolated gates and a circuit thereof are provided to reduce a current consumption since the level of isolated gate control signals are unnecessarily changed during the period when a block refresh is performed in a self refresh(or automatic refresh). CONSTITUTION: A method for controlling isolated gates includes a plurality of isolated gate control signal generators(310L,310R,311L,311L,312L,312R,312L,313R), a plurality of block select signal drivers(320,321,322,323) and a plurality of latches(330,331,332,333). The plurality of isolated gate control signal generators(310L,310R,311L,311L,312L,312R,312L, 313R) are each formed to correspond to memory blocks(150,151,152,153) and also receive corresponding block select signals(BLKi, i = 0-3) and a self refresh mode signal(PSRAS) to output latch isolated control signals(ISOLi, i = 0-3). The plurality of block select signal drivers(320,321,322,323) are each formed to correspond to the memory blocks(150,151,152,153) and also receive the self refresh mode signal(PSRAS), a corresponding block select signals(BLKi) and a corresponding latch isolated control signals(ISOLi) to output the first and second block driving signals(BLSi,BLSAi). The plurality of latches(330,331,332,333) each include NOR gates and an AND gates.