DOE/Opt: a system for design of experiments, response surface modeling, and optimization using process and device simulation

Rapid modeling and optimization of manufacturing processes, devices, and circuits are required to support modern integrated circuit technology development and yield improvement. We have prototyped and applied an integrated system, called DOE/Opt, for performing Design of Experiments (DOE), Response Surface Modeling (RSM), and Optimization (Opt). The system to be modeled and optimized can be either physical or simulation based. Within the DOE/Opt system, coupling to external simulation or experimental tools is achieved via an embedded extension language based on Tcl. The external problem then appears to DOE/Opt as a model with user defined inputs and outputs. DOE/Opt is used to generate splits for experiments, to dynamically build and evaluate regression models from experimental runs, and to perform nonlinear constrained optimizations using either regression models or embedded executions. The intermediate regression modeling can appreciably accelerate the optimization task when simulation or physical experiments are expensive. The primary application of DOE/Opt has been to process optimization using coupled process and device simulation. DOE/Opt has also been applied to process and device simulator tuning, and to aid in device characterization. Such a DOE/Opt system is expected to augment the use of TCAD tools and to utilize data collected by CIM systems in support of process synthesis. We have demonstrated the application of the system to process parameter determination, simulator tuning, process control modeling, and statistical process optimization. We are extending the system to more fully support emerging device design and process synthesis methodologies. >

[1]  Art B. Owen,et al.  Using simulators to model transmitted variability in IC manufacturing , 1989 .

[2]  Andrzej J. Strojwas,et al.  A CFD Model for the Pecvd of Silicon Nitride , 1993, Proceedings. IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop.

[3]  John K. Ousterhout,et al.  An X11 Toolkit Based on the Tcl Language , 1991, USENIX Winter.

[4]  S. Nassif,et al.  Developing and Integrating TCAD Applications with the Semiconductor Wafer Representation , 1992, NUPAD IV. Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits,.

[5]  Dennis L. Young,et al.  Application of statistical design and response surface methods to computer-aided VLSI device design , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Ping Yang,et al.  The determination of SPICE Gummel-Poon parameters by a merged optimization-extraction technique , 1989, Proceedings of the Bipolar Circuits and Technology Meeting.

[7]  N. Draper,et al.  Applied Regression Analysis , 1966 .

[8]  T. J. Sanders,et al.  Integrated circuit design for manufacturing through statistical simulation of process steps , 1992 .

[9]  Duane S. Boning,et al.  Transistor design with TCAD tuning and device optimization for process/device synthesis , 1993, 1993 International Symposium on VLSI Technology, Systems, and Applications Proceedings of Technical Papers.

[10]  A. J. Strojwas The process engineer's workbench , 1988 .

[11]  R.W. Dutton,et al.  VLSI Process modeling—SUPREM III , 1983, IEEE Transactions on Electron Devices.

[12]  A. Owen Controlling correlations in latin hypercube samples , 1994 .

[13]  John K. Ousterhout,et al.  Tcl: An Embeddable Command Language , 1989, USENIX Winter.

[14]  S.W. Director,et al.  An efficient macromodeling approach for statistical IC process design , 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

[15]  Sani R. Nassif,et al.  FABRICS II: A Statistically Based IC Fabrication Process Simulator , 1984, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[16]  Mark R. Simpson PRIDE: an integrated design environment for semiconductor device simulation , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  Jack A. Mandelman,et al.  The use of simulation in semiconductor technology development , 1990 .

[18]  S. Saxena,et al.  A Monitor Wafer Based Controller For Pecvd Silicon Nitride Process On Amt 5000 , 1993, Proceedings. IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop.

[19]  Steven G. Duvall,et al.  EASE--An Application-Based CAD System for Process Design , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[20]  S.S. Mahant-Shetti,et al.  Statistical Modeling for Efficient Parametric Yield Estimation of MOS VLSI Circuits , 1985, IEEE Journal of Solid-State Circuits.

[21]  Ronald L. Iman,et al.  A FORTRAN-77 PROGRAM AND USER'S GUIDE FOR THE GENERATION OF LATIN HYPERCUBE AND RANDOM SAMPLES FOR USE WITH COMPUTER MODELS , 1984 .

[22]  Genichi Taguchi,et al.  Quality Engineering through Design Optimization , 1989 .

[23]  Duane S. Boning,et al.  An Integrated Technology CAD System for Process and Device Designers , 1993, The Sixth International Conference on VLSI Design.

[24]  K. M. Cham,et al.  Computer-Aided Design and VLSI Device Development , 1985 .

[25]  G. Box,et al.  On the Experimental Attainment of Optimum Conditions , 1951 .