A Generalized Architecture for the Frequency- Selective Digital Predistortion Linearization Technique

This paper presents a new architecture for the frequency-selective digital predistortion (DPD) for two- and three-band power amplifier (PA) linearization. Also, largely spaced-signal DPD using a digital intermediate frequency (IF) technique is demonstrated. The algorithm used accounts for differential memory effects up to fifth order for bands that can be arbitrarily spaced. The simulation and experimental studies are performed using various signal sets; two- and three-band multitone signals with various tone spacing, band separation, and complementary cumulative distribution function. An improvement of 10 dB over third-order linearization is demonstrated in simulation for more than 20 dB of adjacent channel power ratio reduction. The test signal and the linearization algorithm were implemented on a field-programmable gate array. The linearization algorithm was applied to an RF amplifier at 700-900 MHz. For the two-band case, more than 15 dB on the in-band, 13 dB on the third, and 5 dB on the fifth intermodulation distortion (IMD) cancellation were achieved. For the three-band case, more than 12 dB of IMD cancellation was observed. For largely spaced signal DPD, more than 15 dB of IMD cancellation was achieved. In the three-band case, the linearization of intermodulation byproducts overlapping with the in-band distortion is found to be of critical importance.