A digitally tuned Voltage Controlled Delay Element for 1-10GHz DLL-based frequency synthesis

This paper presents an original topology for Voltage Controlled Delay Element used in a DLL-based oscillator. This cell works from 1 to 10GHz achieving the phase noise performances required for the targeted wireless standards. The current consumption is lower than 9mA under 1V supply voltage. Thanks to the new topology a delay bank control scheme is feasible, paving the way to digitally controlled DLL.

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