Identification of perimeter depletion and emitter plug effects in deep-submicrometer, shallow-junction polysilicon emitter bipolar transistors

Two new types of narrow-emitter effects are identified in shallow and narrow-junction polysilicon emitter bipolar transistors. These effects result from a lower doping concentration close to the emitter perimeter of large devices (perimeter depletion effect) or in very-narrow-emitter devices where the polysilicon plugs up the emitter window (emitter plug effect). The consequence is a locally shallower emitter junction which causes a reduced collector current density and a nonideal base current due to a partial overlap of the emitter-base space-charge region with the poly/monosilicon interface. The nonuniform doping in the polysilicon is verified by energy-dispersive X-ray spectroscopy (EDX) measurements. Electrical measurements give a clear indication of the emitter plug effect for two different self-aligned transistor structures, and further evidence is given by a comparison of various poly emitter processes. >

[1]  M. A. Shibib,et al.  A minority-carrier transport model for polysilicon contacts to silicon bipolar devices, including solar cells , 1980, 1980 International Electron Devices Meeting.

[2]  G. Patton,et al.  Physics, technology, and modeling of polysilicon emitter contacts for VLSI bipolar transistors , 1986, IEEE Transactions on Electron Devices.

[3]  A. C. Ipri,et al.  A study of hydrogen passivation of grain boundaries in polysilicon thin-film transistors , 1989 .

[4]  R.D. Isaac,et al.  Effect of emitter contact on current gain of silicon bipolar devices , 1980, IEEE Transactions on Electron Devices.

[5]  B. Tsaur,et al.  Epitaxial alignment of polycrystalline Si films on (100) Si , 1980 .

[6]  Ching-Te Chuang Performance degradation due to extrinsic base encroachment in advanced narrow-emitter bipolar circuits. I - Basic inverter. II - Non-threshold logic circuits , 1989 .

[7]  Bernard S. Meyerson,et al.  Self-aligned bipolar epitaxial base n-p-n transistors by selective epitaxy emitter window (SEEW) technology , 1991 .

[8]  H. Ryssel,et al.  Arsenic-implanted polysilicon layers , 1981 .

[9]  J.D. Cressler,et al.  Novel in-situ doped polysilicon emitter process with buried diffusion source (BDS) , 1991, IEEE Electron Device Letters.

[10]  Mitiko Miura-Mattausch,et al.  Dependence of current gain β on spacer geometry and emitter size in polysilicon self-aligned bipolar transistors , 1990 .

[11]  Hans-Martin Rein A simple method for separation of the internal and external (peripheral) currents of bipolar transistors , 1984 .

[12]  R. M. Swanson,et al.  Majority and minority carrier transport in polysilicon emitter contacts , 1986, 1986 International Electron Devices Meeting.

[13]  Self-aligned bipolar npn transistor with 60 nm epitaxial base , 1989, International Technical Digest on Electron Devices Meeting.

[14]  D. Tang,et al.  Injection-induced bandgap narrowing and its effects on the low-temperature operation of silicon bipolar transistors , 1989 .

[15]  Bernard S. Meyerson,et al.  Low‐temperature silicon epitaxy by ultrahigh vacuum/chemical vapor deposition , 1986 .

[16]  Avraham Gover,et al.  Experimental model aid for planar design of transistor characteristics in integrated circuits , 1976 .

[17]  E. Hackbarth,et al.  Identification and implication of a perimeter tunneling current component in advanced self-aligned bipolar transistors , 1988 .

[18]  M. Arienzo,et al.  Diffusion of arsenic in bilayer polycrystalline silicon films , 1984 .

[19]  D. Harame,et al.  High performance operation of silicon bipolar transistors at liquid nitrogen temperature , 1987, 1987 International Electron Devices Meeting.

[20]  J. G. Groot,et al.  The SIS tunnel emitter: A theory for emitters with thin interface layers , 1979 .

[21]  T.I. Kamins Effect of polysilicon-emitter shape on dopant diffusion in polysilicon-emitter transistors , 1989, IEEE Electron Device Letters.

[22]  J. Graul,et al.  High-performance transistors with arsenic-implanted polysil emitters , 1976 .

[23]  D. Roulston,et al.  Modeling of emitter-base bulk and peripheral space-charge-layer recombination currents in bipolar transistors , 1976, IEEE Transactions on Electron Devices.

[24]  Hwa-Nien Yu,et al.  Self-aligned bipolar transistors for high-performance and low-power-delay VLSI , 1981, IEEE Transactions on Electron Devices.

[25]  G. Li,et al.  On the narrow-emitter effect of advanced shallow profile bipolar transistors , 1987, 1987 International Electron Devices Meeting.

[26]  J. Woo,et al.  Non-ideal base current in bipolar transistors at low temperatures , 1987, IEEE Transactions on Electron Devices.

[27]  A. Brunnschweiler,et al.  Emitter resistance of arsenic- and phosphorus-doped polysilicon emitter transistors , 1985, IEEE Electron Device Letters.

[28]  An investigation of the transition from polysilicon emitter to SIS emitter behavior , 1988 .

[29]  J. Sun,et al.  Characteristics of Arsenic Doped Polycrystalline Silicon-Gate Capacitors After Rapid Thermal Processing , 1987 .

[30]  Ching-Te Chuang,et al.  Effect of off-axis implant on the characteristics of advanced self-aligned bipolar transistors , 1987, IEEE Electron Device Letters.

[31]  R. M. Swanson,et al.  SIPOS Heterojunction contacts to silicon , 1984, 1984 International Electron Devices Meeting.

[32]  S. M. Hu,et al.  Interactions in Sequential Diffusion Processes in Semiconductors , 1968 .

[33]  J. A. Mazer,et al.  Effects of grain boundaries on the current-voltage characteristics of polycrystalline silicon solar cells , 1982, IEEE Transactions on Electron Devices.

[34]  J.Y.-C. Sun,et al.  Perimeter and plug effects in deep sub-micron polysilicon emitter bipolar transistors , 1990, Digest of Technical Papers.1990 Symposium on VLSI Technology.

[35]  J. Stork,et al.  Correlation between the diffusive and electrical barrier properties of the interface in polysilicon contacted n+-p junctions , 1985, IEEE Transactions on Electron Devices.

[36]  R.D. Isaac,et al.  Experimental study of the minority-carrier transport at the polysilicon—monosilicon interface , 1985, IEEE Transactions on Electron Devices.

[37]  H. Harrison,et al.  Using Rapid Thermal Processing to Induce Epitaxial Alignment of Polycrystalline Silicon Films on (100) Silicon , 1986 .

[38]  An investigation of the tradeoff between enhanced gain and base doping in polysilicon emitter bipolar transistors , 1985, IEEE Transactions on Electron Devices.

[39]  E.H. Stevens Saturation currents in small-geometry bipolar transistors , 1984, IEEE Transactions on Electron Devices.