Clock accuracy analysis for a coherent IR-UWB system

The performance of a duty-cycled coherent impulse radio UWB system is typically dominated by the accuracy of its timing references. In this paper, a timing analysis is presented for an IR-UWB system to specify the accuracy requirements for the internal clocks of the transceiver. A possible clock generation unit is proposed to realize the coherent reception and improve sensitivity and SNR performance. The analysis is performed for an IEEE802.15.4a compliant data packet, however, can be extended to other IR-UWB standards easily.

[1]  J. Romme,et al.  A multi-GHz 130ppm accuracy FLL for duty-cycled systems , 2011, 2011 IEEE Radio Frequency Integrated Circuits Symposium.

[2]  Jan Craninckx,et al.  A 0.65-to-1.4 nJ/Burst 3-to-10 GHz UWB All-Digital TX in 90 nm CMOS for IEEE 802.15.4a , 2007, IEEE Journal of Solid-State Circuits.

[3]  Kofi A. A. Makinwa,et al.  A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS , 2010, IEEE Journal of Solid-State Circuits.

[4]  A.A. Abidi,et al.  Phase Noise and Jitter in CMOS Ring Oscillators , 2006, IEEE Journal of Solid-State Circuits.

[5]  David D. Wentzloff,et al.  Recent advances in IR-UWB transceivers: An overview , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.