A 0.045- to 2.5-GHz Frequency Synthesizer With TDC-Based AFC and Phase Switching Multi-Modulus Divider

A 0.045- to 2.5- GHz wideband frequency synthesizer (FS) employing time-to-digital converter (TDC) based automatic frequency calibration (AFC) method and phase switching (PS) multi-modulus divider (MMD) is presented in this paper. The traditional counter-based AFC method takes several reference cycles to calculate the instantaneous voltage-controlled oscillator (VCO) frequency, while the proposed TDC-based technique consumes only 2 cycles. In order to suppress the quantization noise caused by the sigma-delta modulator (SDM) in the MMD, the loop division step is reduced from 2 to 0.5 by adopting the PS technique. The FS is designed and implemented using TSMC 180nm RF CMOS process and provides the phase noise performance of −99.5 / −123.5 dBc/Hz at 10kHz/1MHz offsets under 2.4 GHz carrier frequency. The AFC time measurement results for a 6-bit cap-array are 1.25-, 2.5- and 5-<inline-formula> <tex-math notation="LaTeX">$\mathrm {\mu s}$ </tex-math></inline-formula> when employing 48-, 24- and 12-MHz reference frequencies respectively. The chip area including pads and I/Os is 2.31 mm<inline-formula> <tex-math notation="LaTeX">$^{\mathbf {2}}$ </tex-math></inline-formula> and the total power consumption is 108 mW.

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