Newly developed SIMOX wafers have high thickness uniformity of top silicon and buried oxide layers. The top silicon layer is nearly defect-free. It is virtually free from heavy metal contamination caused by implanting and annealing procedures. However, the wide application of SIMOX wafers for advanced circuit production requires further improvement of wafer quality. It has been reported that the gate oxide voltage breakdown of MOSFET's on SIMOX wafers have a higher incidence of low-voltage breakdown than on bulk CZ wafers. This effect has been explained as due to the increased surface microroughness of SIMOX wafers, which leads to a higher thermal oxide defect density than that of the bulk wafers. Therefore, the surface morphology of SIMOX wafers must be improved. In this paper a method for improving the surface morphology is proposed. The method is based on the result that the surface microroughness of SIMOX wafers can be significantly reduced by high-temperature oxidation. The experimental results demonstrate that the surface morphology of SIMOX wafers is improved and the proposed method will allow further improvement of the surface morphology by optimization of the oxidation conditions.