Modeling timing jitter effects in digital-to-analog converters

Jitter affecting the time base of digital-to-analog converters (DAC's) is dealt with. A new analytical model capable of describing the effects on DAC output due to deterministic jitter is proposed. Besides a detailed description of the model, very practical and usable relations are given in order to make its use very straightforward in most applications. Efficacy and reliability of the model are assessed through several experiments on an actual DAC providing different types of analog signals. Special attention is paid to digitally modulated signals peculiar to modern communication systems; their generation is a critical issue because of frequency and modulation constraints imposed by national and international standards

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