The overall efficiency of grid-connected photovoltaic power generation systems depends on the efficiency of the DC-into-AC conversion. Therefore, a key consideration in the design and operation of inverters is how to achieve high efficiency with power output. This paper presents a concept of an inverter for grid connected photovoltaic arrays which can synchronise a sinusoidal current output with a voltage grid. Asymmetric PWM inverters can generate power at unity power factor, this approach, based on the active filter is proposed in this work. This method is used in order to correct the phase between the output current and the grid voltage and to maximize the system efficiency in design and control. The functional structure of this system is presented and simulated. Detailed analysis, Simulations results of output voltage and current waveform demonstrate the contribution of this approach to determinate the suitable control of the system. A digital design of a generator SPWM using VHDL is proposed and implemented on an Xilinx FPGA. Resume - L'efficacite globale des systemes photovoltaiques connectes au reseau electrique depend de l'efficacite de la conversion DC-AC. Par consequent, la consideration cle dans la conception et le fonctionnement des onduleurs est de savoir comment adapter un rendement eleve avec une puissance de sortie. Cet article presente le concept d'un onduleur, pour des surfaces photovoltaiques connectees au reseau, afin de synchroniser le courant sinusoidal avec la tension du reseau. Des onduleurs asymetriques PWM peuvent generer de la puissance pour un facteur de puissance unitaire, approche basee sur un filtre actif, qui est propose dans ce travail. Cette methode est utilisee afin de corriger la phase entre le courant de sortie et la tension du reseau et de maximiser l'efficacite de systeme dans la conception et la commande. La structure fonctionnelle de ce systeme est presentee et simulee. L'analyse detaillee, les resultats de simulation de la tension de sortie et de l'onde du courant demontrent la contribution de cette approche a determiner la commande appropriee du systeme. Une conception numerique d'un generateur SPWM employant le VHDL est proposee et mise en application sur un Xilinx FPGA.
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