Scheduling and behavioral transformation for parallel systems

How to efficiently and optimally schedule a program with loops is an important problem in VLSI high level synthesis and compilers for parallel machines. For a signal flow graph of a DSP filter, or a data flow graph of a behavioral description, we would like to know how to transform this graph such that a final synthesized program or hardware is possible to achieve the highest pipeline rate. A new technique is designed by combining two transformation techniques, retiming and unfolding (or called unrolling), to obtain effective static schedules. Many fundamental properties of loop scheduling are derived through this combination. This new technique turns out to be very useful, and can be generalized to other problems. For example, the problem of software pipelining in parallel compilers is modeled as a special case of our technique. Efficient polynomial-time algorithms are derived for the scheduling on different parallel models and implementation styles. For uniform nested loops, multi-dimensional retiming and unfolding are defined and studied for nested loop pipelining. Based on the theoretical results, a novel technique, rotation, is designed for loop pipelining under resource constraints. Rotation technique repeatedly transforms a schedule to a more compact schedule. The rotation scheduling gives the currently best performance from experiments on benchmarks.