VLSI implementation of a quasi-ml, energy efficient fixed complexity sphere decoder for MIMO communication system

This paper presents a low power VLSI implementation of a novel Multiple-Input Multiple-Output (MIMO) decoder which combines Fixed Complexity Sphere Decoder (FSD) algorithm, real-valued lattice formulation and Pair-wise sorted QR decomposition (P-SQRD) searching approach to simultaneously improve the throughput, bit error rate (BER) and complexity. Two-stage approximate sorting scheme with minimum data swapping is adopted to realize a power efficient architecture. This ASIC is implemented in IBM 90 nm 8 metal layer standard CMOS technology with core area of 1.3 mm2. This design supports 4×4 antenna array with flexible modulations from BPSK to 16-QAM. At 0.8V core power supply, the estimated peak data rate exceeds 1.44Gbps. The estimated energy efficiency is 15.4 pJ/bit which is 50% better than the other state of the art SDs [1], [7].

[1]  Ender Ayanoglu,et al.  Reduced Complexity Sphere Decoding for Square QAM via a New Lattice Representation , 2007, IEEE GLOBECOM 2007 - IEEE Global Telecommunications Conference.

[2]  Andreas Peter Burg,et al.  K-best MIMO detection VLSI architectures achieving up to 424 Mbps , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[3]  A. Burg,et al.  VLSI implementation of MIMO detection using the sphere decoding algorithm , 2005, IEEE Journal of Solid-State Circuits.

[4]  Los Angeles,et al.  DSP Architecture Optimization in MATLAB/Simulink Environment , 2008 .

[5]  Andreas Peter Burg,et al.  Reduced-complexity mimo detector with close-to ml error rate performance , 2007, GLSVLSI '07.

[6]  Helmut Bölcskei,et al.  Advanced receiver algorithms for MIMO wireless communications , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[7]  L. G. Barbero,et al.  A Fixed-Complexity MIMO Detector Based on the Complex Sphere Decoder , 2006, 2006 IEEE 7th Workshop on Signal Processing Advances in Wireless Communications.

[8]  Dejan Markovic,et al.  A Flexible VLSI Architecture for Extracting Diversity and Spatial Multiplexing Gains in MIMO Channels , 2008, 2008 IEEE International Conference on Communications.