16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM macros with wordline overdriven assist

We demonstrate 16 nm FinFET High-k/Metal-gate SRAM macros with a wordline (WL) overdriven read/write-assist circuit. Test-chip measurements confirm improved minimum operating voltage (Vmin), standby leakage current, and access time compared to planar bulk CMOS. The proposed assist circuit improves Vmin by 50 mV and improves read-access-time by more than 1.5 times in 256-kbit SRAM macros. Read current (Iread) dependence against the fin diffusion length was observed. An extra design guard-band is needed to provide a reliable operation margin.