Output current enhanced cyclic switched-capacitor step-down DC–DC regulator

Here, we propose a three-phase cyclic switched-capacitor step-down DC–DC regulator, which enhances output current while using the same total flying capacitance and keeping the same ideal power conversion efficiency as the conventional topology. Dual output voltages of 1.5 and 3.0 V using conversion ratios of 1/3 and 2/3 are obtained with a 5 V input voltage. The theoretical normalised output current (I norm) is 33% higher than that of the conventional topology. The measured I norm reaches 0.428 A/(F ·Hz) with 1 nF on-chip flying capacitors (C f) at a switching frequency (f) of 20.8 MHz using 0.25 μm CMOS technology.