2.5 GSPS/1 GHz wide band digital receiver

Today's very deep submicron IC technology enables high performance analog and digital applications to be integrated on a single IC chip. For this effort, a design of 2.5 giga-sample per second (GSPS) electronic warfare (EW) receiver-on-a-chip (ROC) is presented. For our design, we take advantage of a super-resolution technique to reduce sidelobes and spurs for improving instantaneous dynamic range. A major goal is to produce a low cost, small and lightweight, and low power EW ROC. Our design covers a 1 GHz bandwidth (125 MHz - 1125 MHz), and it correctly processes two simultaneous signals by detecting their frequency, pulse width (PW), and time of arrival (TOA). The single or dual signal, spur free dynamic ranges and two signal instantaneous dynamic ranges of our design are high. The minimum frequency separation of two signals is 10 MHz (one channel width), the maximum amplitude separation of two signals is 18 dB, and the second signal false alarm is less than 1%.