Memristor-Based Multilevel Digital Systems

This chapter investigates the advantages of memristor-based digital applications using multi-level arithmetic concepts. Recently, there are huge concerns regarding the memristor in digital signal processing (DSP) circuits to enhance the performance and realize very high density, nonvolatile memories in neural networks. This can be achieved by mapping the high/low logic into the memristor high/low resistances. Recently, the potential to divide the memristance levels to build multilevel digital circuits such as the ternary and redundant circuits are discussed. The concepts have been initiated by designing a half ternary adder based on the memristor; then, the concept is generalized for redundant half adder, full adder, and N-bit adder circuits. The advantages of such circuits that the speed is independent on the operand and parallel processing can be handled efficiently. Moreover, a general approach to build digital functions using mixed memristor-transistor circuits are investigated such as multipliers.

[1]  Orest J. Bedrij.  Carry-Select Adder , 1962, IRE Trans. Electron. Comput..

[2]  M. Lehman,et al.  Skip Techniques for High-Speed Carry-Propagation in Binary Arithmetic Units , 1961, IRE Trans. Electron. Comput..

[3]  Mark Glusker,et al.  The ternary calculating machine of Thomas Fowler , 2005 .

[4]  Ieee Circuits,et al.  MWSCAS 2004 : the 2004 47th Midwest Symposium on Circuits and Systems conference proceedings, Hiroshima, Japan, July 25-28, 2004 , 2004 .

[5]  Hyongsuk Kim,et al.  Highly Accurate Doublet Generator for memristor-Based Analog Memory , 2012, Int. J. Bifurc. Chaos.

[6]  Koji Nakano,et al.  Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs , 2008, 2008 Ninth International Conference on Parallel and Distributed Computing, Applications and Technologies.

[7]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[8]  J. L. Smith,et al.  A One-Microsecond Adder Using One-Megacycle Circuitry , 1956, IRE Trans. Electron. Comput..

[9]  Lars Wanhammar.  DSP integrated circuits , 1999 .

[10]  Christopher S. Wallace,et al.  A Suggestion for a Fast Multiplier , 1964, IEEE Trans. Electron. Comput..

[11]  A. L. Fisher,et al.  Ultrafast compact 32-bit CMOS adders in multiple-output domino logic , 1989 .

[12]  L.J. Karam,et al.  Canonic signed digit Chebyshev FIR filter design , 2001, IEEE Signal Processing Letters.

[13]  Dmitri B. Strukov,et al.  SpongeDirectory: Flexible sparse directories utilizing multi-level memristors , 2014, 2014 23rd International Conference on Parallel Architecture and Compilation (PACT).

[14]  A.Z. Sadik,et al.  Towards a Ternary Sigma-Delta Modulated Processor: Adder and Integrator , 2008, 2008 IEEE 8th International Conference on Computer and Information Technology Workshops.

[15]  Wu Jun-Jie,et al.  SPICE modeling of memristors with multilevel resistance states , 2012 .

[16]  I. Koren.  Computer arithmetic algorithms , 2018 .