论文信息 - Transactional coherence and consistency: simplifying parallel hardware and software

Transactional coherence and consistency: simplifying parallel hardware and software

Transactional coherence and consistency (TCC) simplifies parallel hardware and software design by eliminating the need for conventional cache coherence and consistency models and letting programmers parallelize a wide range of applications with a simple, lock-free transactional model. TCC eases both parallel programming and parallel architecture design by relying on programmer-defined transactions as the basic unit of parallel work, communication, memory coherence, and memory consistency

[1] Paul Dehart Hurd,et al. At Stanford University , 1965 .

[2] Josep Torrellas,et al. Speculative synchronization: applying thread-level speculation to explicitly parallel applications , 2002, ASPLOS X.

[3] Kunle Olukotun,et al. Transactional memory coherence and consistency , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[4] Josep Torrellas,et al. Speculative Synchronization: Applying thread-level speculation to parallel applications , 2002, ASPLOS 2002.

[5] Maurice Herlihy,et al. Transactional Memory: Architectural Support For Lock-free Data Structures , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[6] James R. Goodman,et al. Transactional lock-free execution of lock-based programs , 2002, ASPLOS X.

[7] Kunle Olukotun,et al. Programming with transactional coherence and consistency (TCC) , 2004, ASPLOS XI.

[8] Kunle Olukotun,et al. The Jrpm system for dynamically parallelizing Java programs , 2003, ISCA '03.