Modeling of transaction level for SoC

In order to find the bottleneck of the SoC's performance and make a strategic decision for communication architecture,a modeling of transaction level for SoC using SystemC was introduced.The main idea of this method was that the modules were connected to the channels through the ports and the methods in the interfaces were implemented through the channels.The experimental results revealed that the bus model was completely compliant to AHB specification.The rapidity of modeling running under transaction level was higher than that of under register transfer level.This method would help to look for the ideal communication architecture of the chip bus in the early of the design.