Modular performance analysis of cyclic dataflow graphs
暂无分享,去创建一个
[1] Tadao Murata,et al. Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.
[2] Bin Liu,et al. Analysis of manufacturing blocking systems with Network Calculus , 2006, Perform. Evaluation.
[3] Jean-Yves Le Boudec,et al. Network Calculus: A Theory of Deterministic Queuing Systems for the Internet , 2001 .
[4] E.A. Lee,et al. Synchronous data flow , 1987, Proceedings of the IEEE.
[5] C. Leake. Synchronization and Linearity: An Algebra for Discrete Event Systems , 1994 .
[6] Brian A. Davey,et al. An Introduction to Lattices and Order , 1989 .
[7] Samarjit Chakraborty,et al. Lightweight Modeling of Complex State Dependencies in Stream Processing Systems , 2009, 2009 15th IEEE Real-Time and Embedded Technology and Applications Symposium.
[8] J. Quadrat,et al. A linear-system-theoretic view of discrete-event processes , 1983, The 22nd IEEE Conference on Decision and Control.
[9] Orlando Moreira,et al. Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor , 2007, EMSOFT '07.
[10] Wang Yi,et al. Cyclic dependencies in modular performance analysis , 2008, EMSOFT '08.
[11] Michael Kishinevsky,et al. Performance Analysis Based on Timing Simulation , 1994, 31st Design Automation Conference.
[12] Edward A. Lee,et al. Dataflow process networks , 2001 .
[13] John A. Clark,et al. Holistic schedulability analysis for distributed hard real-time systems , 1994, Microprocess. Microprogramming.
[14] Lothar Thiele,et al. Workload characterization model for tasks with variable execution demand , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[15] David L. Dill,et al. Approximate algorithms for time separation of events , 1997, 1997 Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).
[16] Gerard J. M. Smit,et al. Efficient computation of buffer capacities for multi-rate real-time systems with back-pressure , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).
[17] Lothar Thiele,et al. A framework for evaluating design tradeoffs in packet processing architectures , 2002, DAC '02.
[18] Raymond Reiter,et al. Scheduling Parallel Computations , 1968, J. ACM.
[19] Rolf Ernst,et al. Enabling scheduling analysis of heterogeneous systems with multi-rate data dependencies and rate intervals , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[20] Rene L. Cruz,et al. A calculus for network delay, Part I: Network elements in isolation , 1991, IEEE Trans. Inf. Theory.
[21] Cheng-Kok Koh,et al. Performance analysis of latency-insensitive systems , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[22] Shuvra S. Bhattacharyya,et al. Embedded Multiprocessors: Scheduling and Synchronization , 2000 .
[23] Lothar Thiele,et al. Complex task activation schemes in system level performance analysis , 2007, 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[24] Steven M. Burns,et al. Bounded delay timing analysis of a class of CSP programs with choice , 1994, Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems.
[25] Twan Basten,et al. Task-level timing models for guaranteed performance in multiprocessor networks-on-chip , 2003, CASES '03.
[26] Edward A. Lee,et al. Synthesis of Embedded Software from Synchronous Dataflow Specifications , 1999, J. VLSI Signal Process..
[27] Sander Stuijk,et al. Throughput Analysis of Synchronous Data Flow Graphs , 2006, Sixth International Conference on Application of Concurrency to System Design (ACSD'06).
[28] Petru Eles,et al. Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems , 2002, Proceedings of the Tenth International Symposium on Hardware/Software Codesign. CODES 2002 (IEEE Cat. No.02TH8627).
[29] Rolf Ernst,et al. Performance Analysis of Complex Systems by Integration of Dataflow Graphs and Compositional Performance Analysis , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.
[30] Edward G. Coffman,et al. Efficient performance analysis of asynchronous systems based on periodicity , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).
[31] Marcel Verhoef,et al. System architecture evaluation using modular performance analysis: a case study , 2006, International Journal on Software Tools for Technology Transfer.
[32] Lothar Thiele,et al. A general framework for analysing system properties in platform-based embedded system designs , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[33] G. G. Stokes. "J." , 1890, The New Yale Book of Quotations.
[34] Cheng-Shang Chang,et al. Performance guarantees in communication networks , 2000, Eur. Trans. Telecommun..
[35] Peter A. Beerel,et al. Bounding average time separations of events in stochastic timed Petri nets with choice , 1999, Proceedings. Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems.
[36] Rolf Ernst,et al. Performance analysis for complex embedded applications , 2005, Int. J. Embed. Syst..