论文信息 - A 1-V input, 0.2-V to 0.47-V output switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction

A 1-V input, 0.2-V to 0.47-V output switched-capacitor DC-DC converter with pulse density and width modulation (PDWM) for 57% ripple reduction

To effectively reduce output ripple of switched-capacitor DC-DC converters which generate variable output voltages, a novel feedback control scheme is presented. The proposed scheme uses pulse density and width modulation (PDWM) to reduce the output ripple with low output voltage. The prototype chip was implemented using 65nm CMOS process. The switched-capacitor DC-DC converter has 0.2-V to 0.47-V output voltage and delivers 0.25-mA to 10-mA output current from a 1-V input supply with a peak efficiency of 87%. Compared with the conventional pulse density modulation (PDM), the proposed switched-capacitor DC-DC converter with PDWM reduces the output ripple by 57% in the low output voltage region with the efficiency penalty of 2%.

[1] Dongsheng Ma,et al. A monolithic step-down SC power converter with frequency-programmable subthreshold z-domain DPWM control for ultra-low power microsystems , 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

[2] A.P. Chandrakasan,et al. Minimum Energy Tracking Loop With Embedded DC–DC Converter Enabling Ultra-Low-Voltage Operation Down to 250 mV in 65 nm CMOS , 2008, IEEE Journal of Solid-State Circuits.

[3] Po-Chiun Huang,et al. An Integrated 1.2V-to-6V CMOS Charge-Pump for Electret Earphone , 2007, 2007 IEEE Symposium on VLSI Circuits.

[4] Dongsheng Ma. Robust Multiple-Phase Switched-Capacitor DC-DC, Converter with Digital Interleaving Regulation Scheme , 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.

[5] Anantha P. Chandrakasan,et al. A 0.16mm2 completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

[6] A.P. Chandrakasan,et al. A 65 nm Sub-$V_{t}$ Microcontroller With Integrated SRAM and Switched Capacitor DC-DC Converter , 2008, IEEE Journal of Solid-State Circuits.

[7] David J. Perreault,et al. Distributed interleaving of paralleled power converters , 1997 .