Retargetable compilers and architecture exploration for embedded processors

Retargetable compilers can generate assembly code for a variety of different target processor architectures. Owing to their use in the design of application-specific embedded processors, they bridge the gap between the traditionally separate disciplines of compiler construction and electronic design automation. In particular, they assist in architecture exploration for tailoring processors towards a certain application domain. The paper reviews the state-of-the-art in retargetable compilers for embedded processors. Based on some essential compiler background, several representative retargetable compiler systems are discussed, while also outlining their use in iterative, profiling-based architecture exploration. The LISATek C compiler is presented as a detailed case study, and promising areas of future work are proposed.

[1]  Rainer Leupers,et al.  Retargetable Compiler Technology for Embedded Systems , 2001, Springer US.

[2]  Srivaths Ravi,et al.  Synthesis of custom processors based on extensible platforms , 2002, ICCAD 2002.

[3]  Alexander V. Veidenbaum,et al.  Guest Editors' Introduction: Application-Specific Microprocessors , 2003, IEEE Des. Test Comput..

[4]  Christopher W. Fraser,et al.  Engineering a simple, efficient code-generator generator , 1992, LOPL.

[5]  Rainer Leupers,et al.  C compiler design for a network processor , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[6]  Christopher W. Fraser,et al.  A Retargetable C Compiler: Design and Implementation , 1995 .

[7]  Peter Marwedel,et al.  Reducing energy consumption by dynamic copying of instructions onto onchip memory , 2002, 15th International Symposium on System Synthesis, 2002..

[8]  Andrew W. Appel,et al.  Modern Compiler Implementation in ML , 1997 .

[9]  John L. Hennessy,et al.  Register allocation by priority-based coloring , 1984, SIGPLAN '84.

[10]  Darin Petkov,et al.  Automatic generation of application specific processors , 2003, CASES '03.

[11]  Rainer Leupers,et al.  Retargetable compiler technology for embedded systems - tools and applications , 2001 .

[12]  Alfred V. Aho,et al.  Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.

[13]  Preston Briggs,et al.  Register allocation via graph coloring , 1992 .

[14]  Heiko Falk,et al.  Control Flow Driven Splitting of Loop Nests at the Source Code Level , 2003, DATE.

[15]  Paolo Ienne,et al.  Automatic application-specific instruction-set extensions under microarchitectural constraints , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[16]  Tony Mason,et al.  Lex & Yacc , 1992 .

[17]  Andrew W. Appel,et al.  Modern Compiler Implementation in Java , 1997 .

[18]  Rainer Leupers,et al.  Retargetable Code Generation Based on Structural Processor Description , 1998, Des. Autom. Embed. Syst..

[19]  Alfred V. Aho,et al.  Code Generation for Expressions with Common Subexpressions , 1977, J. ACM.

[20]  Mary Jane Irwin,et al.  Banked scratch-pad memory management for reducing leakage energy consumption , 2004, ICCAD 2004.

[21]  Rainer Leupers,et al.  Architecture exploration for embedded processors with LISA , 2002 .

[22]  Sharad Malik,et al.  Power analysis and minimization techniques for embedded DSP software , 1997, IEEE Trans. Very Large Scale Integr. Syst..