Low-power high-frequency class-AB two-step sampling switched-current techniques

The development of a class-AB technique in two-step sampling switched currents (S/sup 2/I) is presented. The technique offers a significant improvement over the conventional class-A S/sup 2/I in terms of both linearity and a figure-of-merit combining speed, power consumption, and signal-to-noise ratio. In addition, it enables the S/sup 2/I scheme to operate at lower supply voltages responding to the demand for a supply reduction in modern digital CMOS processes. An experimental S/sup 2/I sample-and-hold circuit based on two parallel S/sup 2/I memories achieved better than -63 dB total harmonic distortion, 63.6 dB signal-to-noise ratio, and dissipated 1.45 mW at more than 120-MHz sampling rate and a supply voltage of 2.4 V. These indicate an overall improvement by a factor of about 2.9 in comparison with the test results obtained from the class-A S/sup 2/I sample-and-hold circuit designed to operate at exactly the same conditions.

[1]  N. C. Battersby,et al.  Class AB switched-current memory for analogue sampled-data systems , 1991 .

[2]  John B. Hughes,et al.  Switched-current signal processing for video frequencies and beyond , 1993 .

[3]  John B. Hughes,et al.  S/sup 2/I: a switched-current technique for high performance , 1993 .

[4]  N. C. Battersby,et al.  A high-frequency fifth order switched-current bilinear elliptic lowpass filter , 1994 .

[5]  Terri S. Fiez,et al.  Accurate SI filters using RGC integrators , 1994 .

[6]  D. G. Nairn.  A high-linearity sampling technique for switched-current circuits , 1996 .

[7]  D. G. Nairn,et al.  A comparative analysis of switched-current circuits , 1996 .

[8]  John B. Hughes,et al.  Automated design of switched-current filters , 1996, IEEE J. Solid State Circuits.

[9]  Andreas Kaiser,et al.  Design techniques for high-resolution current-mode sigma-delta modulators , 1997 .

[10]  Patrick Loumeau,et al.  A low-supply SI-cell using threshold control , 1998, 1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196).

[11]  J.B. Hughes,et al.  Error neutralisation in switched current memory cells , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[12]  John B. Hughes,et al.  Class AB technique for high performance switched-current memory cells , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[13]  John B. Hughes,et al.  Switched-capacitors versus switched-currents: a theoretical comparison [in CMOS] , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[14]  John B. Hughes,et al.  A low-voltage neutralised class AB switched-current technique , 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

[15]  John B. Hughes,et al.  Switched-Capacitors or Switched-Currents – Which Will Succeed? , 2002 .

[16]  John B. Hughes,et al.  Low voltage techniques for switched-current filters , 2002 .

[17]  P. E. Allen,et al.  Switched-current circuits in digital CMOS technology with low charge-injection errors , 2002 .