On-Chip High-Voltage Charge Pump Circuit in Standard CMOS Processes With Polysilicon Diodes

An on-chip high-voltage charge pump circuit realized with the polysilicon diodes in standard (bulk) CMOS process is presented in this paper. Because the polysilicon diodes are fully isolated from the substrate, the output voltage of the charge pump circuit is not limited by the junction breakdown voltage of MOSFETs. The polysilicon diodes can be implemented in the standard CMOS processes without extra process steps. The proposed charge pump circuit has been fabricated in a 0.25-mum 2.5-V standard CMOS process. The output voltage of the 12-stage charge pump circuit can be pumped up to 28.08 V, which is much higher than the n-well/p-substrate breakdown voltage (18.9 V) in a 0.25-mum 2.5-V standard CMOS process

[1]  J. F. Dickson,et al.  On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique , 1976 .

[2]  S. Saeki,et al.  Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories , 1996, IEEE J. Solid State Circuits.

[3]  Tae-Sung Jung,et al.  Floating-well Charge Pump Circuits For Sub-2.0V Single Power Supply Flash Memories , 1997, Symposium 1997 on VLSI Circuits.

[4]  Jieh-Tsorng Wu,et al.  MOS charge pumps for low-voltage operation , 1998, IEEE J. Solid State Circuits.

[5]  R. St. Pierre,et al.  Low-power BiCMOS op-amp with integrated current-mode charge pump , 2000, IEEE J. Solid State Circuits.

[6]  Angela Arapoyanni,et al.  A CMOS charge pump for low voltage operation , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).

[7]  Y. J. Park,et al.  A new charge pump without degradation in threshold voltage due to body effect [memory applications] , 2000, IEEE Journal of Solid-State Circuits.

[8]  Kentaro Watanabe,et al.  High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories , 2002 .

[9]  H. Mantooth,et al.  A high voltage Dickson charge pump in SOI CMOS , 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..

[10]  Chia-Sheng Tsai,et al.  A new charge pump circuit dealing with gate-oxide reliability issue in low-voltage processes , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[11]  H. Alan Mantooth,et al.  Design technique of an on-chip, high-voltage charge pump in SOI , 2005, 2005 IEEE International Symposium on Circuits and Systems.