Modeling and analysis of multichip module power supply planes
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[1] Aaas News,et al. Book Reviews , 1893, Buffalo Medical and Surgical Journal.
[2] Jiayuan Fang,et al. Modeling of Delta-I noise in digital electronics packaging , 1994, Proceedings of IEEE Multi-Chip Module Conference (MCMC-94).
[3] Wiren D. Becker,et al. Power distribution modelling of high performance first level computer packages , 1993, Proceedings of IEEE Electrical Performance of Electronic Packaging.
[4] Andreas C. Cangellaris,et al. Modeling and simulation of coupled transmission line interconnects over a noisy reference plane , 1993 .
[5] Raj Mittra,et al. Efficient modeling of power planes in computer packages using the finite difference time domain method , 1994 .
[6] E. E. Davidson,et al. Electrical design of a high speed computer package , 1982 .
[7] B. Beker,et al. EM analysis of low inductance decoupling capacitors , 1993, Proceedings of IEEE Electrical Performance of Electronic Packaging.
[8] J. L. Prince,et al. Simultaneous switching ground noise calculation for packaged CMOS devices , 1991 .
[9] George A. Katopis,et al. Decoupling capacitor effects on switching noise , 1992, [1992 Proceedings] Electrical Performance of Electronic Packaging.
[10] Keunmyung Lee,et al. A bare-chip probe for high I/O, high speed testing , 1994 .
[11] George A. Katopis,et al. Decoupling capacitor effects on switching noise , 1993 .