Using IP Cores in Synchronous Languages

Synchronous programs offer comfortable statements for preemption, which allow statements to abort or suspend other statements. However, while these preemption statements can be used to conveniently describe complex control behaviors in a concise, but yet precise way, they impose very difficult problems for the modular synthesis of systems. For this reason, the integration and re-use of already pre-compiled IP cores has so far only been possible in two restricted variants: either by calls to instantaneous procedures of the host language or by calls to asynchronous tasks of the host language. The first variant is restricted to combinational circuits, and the second variant breaks the synchronous design

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