Synthesis of generalized immitance converters via signal-flow graphs

Abstract This paper describes a synthesis procedure of the structures which input impedance (admittance) is proportional to the product of their immitances (i.e. admittances and impedances). Such structures have many applications in the design of a wide range of circuits such as active filters, oscillators, phase shifters, as well as for parasitic element cancellation and for impedance matching. Up to date, such structures have been developed in two ways. The first was based on deus ex machina rule. Designers were relied on experience and simulation verifications when designing these circuits. The second way was based on the systematic generation (synthesis) of such circuits. Two methods have been used in active network synthesis. The first consists of using the transfer function of the network and the second uses the nodal admittance matrix expansion. In this paper, we propose a novel synthesis method for the generation of the generalized immitance converters via signal-flow graphs. This method is very easy and gives structures of both the voltage and the current generalized immitance converters. Further, it is not limited to the use of a particular analog building block. The synthesis of two types of generalized immitance inverters using unity gain cells is also given. Comparisons with simulation results performed using ideal unity gain cells, CMOS current conveyors and the commercially available AD844 IC are given.

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