Division-less high-radix interleaved modular multiplication using a scaled modulus
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[1] Woo-Young Choi,et al. A 5-Gb/s low-power transmitter with voltage-mode output driver in 90nm CMOS technology , 2011, 2011 International SoC Design Conference.
[2] Michael J. Flynn,et al. Division Algorithms and Implementations , 1997, IEEE Trans. Computers.
[3] Nadia Nedjah,et al. Three hardware architectures for the binary modular exponentiation: sequential, parallel, and systolic , 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.
[4] Frederik Vercauteren,et al. Faster Interleaved Modular Multiplication Based on Barrett and Montgomery Reduction Methods , 2010, IEEE Transactions on Computers.
[5] Jean-Jacques Quisquater,et al. Recent Results on Modular Multiplications for Smart Cards , 1998, CARDIS.
[6] P. L. Montgomery. Modular multiplication without trial division , 1985 .