An Ultra-Wideband IF Millimeter-Wave Receiver With a 20 GHz Channel Bandwidth Using Gain-Equalized Transformers

This paper presents a CMOS millimeter-wave (mm-wave) receiver designed to meet the challenges in low-power, ultra-broadband, phased-array systems with a large number of array elements. This receiver employs a high intermediatefrequency (IF) heterodyne architecture to reduce the frequency and power consumption associated with distributing a local oscillator (LO). The receiver operates over a bandwidth of 51-71 GHz, while maintaining 20 GHz of bandwidth along the signal chain of the entire mm-wave front end, through a high-IF stage, and to the baseband output. To maintain a high fractional bandwidth (fBW) throughout the signal chain, this receiver employs multiple gainequalized transformers. Receiver measurements show an overall flat bandwidth response of 20 GHz, with a total gain of 20 dB, a minimum double-sideband noise figure of 7.8 dB, and an input 1 dB compression power of -24 dBm while consuming 115 mW from a 1.1 V supply. The test chip, implemented in a six-metal layer 40 nm CMOS process, occupies an area (including pads) of 1.2 mm2.

[1]  H. Hashemi,et al.  A 24-GHz SiGe phased-array receiver-LO phase-shifting approach , 2005, IEEE Transactions on Microwave Theory and Techniques.

[2]  Jri Lee,et al.  A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology , 2008, IEEE Journal of Solid-State Circuits.

[3]  B. Razavi,et al.  A 60-GHz CMOS receiver front-end , 2006, IEEE Journal of Solid-State Circuits.

[4]  Sorin P. Voinigescu,et al.  An 18-Gb/s, Direct QPSK Modulation SiGe BiCMOS Transceiver for Last Mile Links in the 70–80 GHz Band , 2009, IEEE Journal of Solid-State Circuits.

[5]  R.W. Brodersen,et al.  Millimeter-wave CMOS design , 2005, IEEE Journal of Solid-State Circuits.

[6]  H. T. Friis,et al.  A Multiple Unit Steerable Antenna for Short-Wave Reception , 1937, Proceedings of the Institute of Radio Engineers.

[7]  D. Parker,et al.  Phased arrays - part 1: theory and architectures , 2002 .

[8]  Noriaki Kaneda,et al.  A 70–100 GHz Direct-Conversion Transmitter and Receiver Phased Array Chipset Demonstrating 10 Gb/s Wireless Link , 2013, IEEE Journal of Solid-State Circuits.

[9]  Ali M. Niknejad,et al.  A 240GHz wideband QPSK receiver in 65nm CMOS , 2014, 2014 IEEE Radio Frequency Integrated Circuits Symposium.

[10]  R.W. Brodersen,et al.  A 60-GHz down-converting CMOS single-gate mixer , 2005, 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers.

[11]  Kenichi Okada.  A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver , 2011, 2011 9th IEEE International Conference on ASIC.

[12]  Jacques C. Rudell,et al.  A Compact 77% Fractional Bandwidth CMOS Band-Pass Distributed Amplifier With Mirror-Symmetric Norton Transforms , 2015, IEEE Journal of Solid-State Circuits.

[13]  Davide Guermandi,et al.  A Wideband Receiver for Multi-Gbit/s Communications in 65 nm CMOS , 2011, IEEE Journal of Solid-State Circuits.

[14]  Ehsan Afshari,et al.  A Low-Phase-Noise Wide-Tuning-Range Oscillator Based on Resonant Mode Switching , 2012, IEEE Journal of Solid-State Circuits.

[15]  A. Tomkins,et al.  Nanoscale CMOS Transceiver Design in the 90–170-GHz Range , 2009, IEEE Transactions on Microwave Theory and Techniques.

[16]  Sandipan Kundu,et al.  A Compact, Supply-Voltage Scalable 45–66 GHz Baseband-Combining CMOS Phased-Array Receiver , 2015, IEEE Journal of Solid-State Circuits.