论文信息 - Highly linear four quadrant analog BiCMOS multiplier for /spl plusmn/1.5 V supply operation

Highly linear four quadrant analog BiCMOS multiplier for /spl plusmn/1.5 V supply operation

A highly linear four-quadrant analog BiCMOS multiplier is presented. It operates with /spl plusmn/1.5 V supplies and with 2 Vp-p input and output signal swings. It is based on the utilization of cross-coupled, voltage-biased differential pairs. Experimental results of a CMOS test chip are presented. They confirm the proposed structure.<<ETX>>

J. Ramirez-Angulo

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