FEM-TORUS: token driven processor torus array functional simulation and performance evaluation — for processing of finite-element-method matrices

In previous work, we designed architecture of FEM-TORUS, torus array of processing elements PE that are supposed to be conventional VLSI microprocessors operating in the data-driven mode with message-passing communication, and described wavefront-driven hardware algorithms on it for solving band-limited linear systems Ax=b often encountered in the finite-element-method analysis of partial differential equations. FEM-TORUS is a paper machine without hardware implementation but with a simulator that accepts application programs to execute. In this paper we presents register-transfer level simulation system SISY that is run to check workability of PE-facilities and correctness of hardware algorithms. OS and instruction micro-code are resident in each PE-ROM and occupy about 1800 bytes. Application program for solving Ax=b requires about 1500 bytes and is copied into each PE-RAM. Total run-time was measured for a wide range combination of matrix sizes, array sizes and communication overheads.