Reconfigurable Dual-Channel Multiband RF Receiver for GPS/Galileo/BD-2 Systems

A fully integrated dual-channel multiband RF receiver is designed and implemented for next-generation global navigation satellite systems (GNSSs) in a 0.18-μm CMOS process. Its two reconfigurable signal channels can simultaneously process any two types of 2-, 4-, or 20-MHz bandwidth signals mainly located around the RF bands of 1.2 and 1.57 GHz for GPS, Galileo, and BD-2 (aka Compass) systems, while achieving better performance (die area, noise figure, gain dynamic range) than other state-of-the-art GNSS receivers. A digital automatic gain control loop consisting of a variable gain amplifier and nonuniform 4-bit ADC is utilized to improve the receiver's robustness and performance in the presence of interferences. While drawing 25-mA current per channel from a 1.8-V supply, this RF receiver achieves a total noise figure of 2.5 dB/2.7 dB at 1.2/1.57 GHz, an image rejection of 28 dB, a maximum voltage gain of 110 dB, a gain dynamic range of 73 dB, and an input-referred 1-dB compression point of -58 dBm, with an active die area of 2.4 mm2 for single channel.

[1]  Mark Miles Cloutier,et al.  A 4-dB NF GPS receiver front-end with AGC and 2-b A/D , 1999, Proceedings of the IEEE 1999 Custom Integrated Circuits Conference (Cat. No.99CH36327).

[2]  Jinbo Li,et al.  Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[3]  Michael S. Braasch,et al.  GPS receiver architectures and measurements , 1999, Proc. IEEE.

[4]  K. Uyttenhove,et al.  A 1.8-V 6-bit 1.3-GHz flash ADC in 0.25-μm CMOS , 2003, IEEE J. Solid State Circuits.

[5]  Shin-Il Lim,et al.  Charge pump with perfect current matching characteristics in phase-locked loops , 2000 .

[6]  S. Das,et al.  A 56-mW 23-mm/sup 2/ single-chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm/sup 2/ radio , 2006, IEEE Journal of Solid-State Circuits.

[7]  Jun-Gi Jo,et al.  An $L1$ -Band Dual-Mode RF Receiver for GPS and Galileo in 0.18- $\mu {\hbox{m}}$ CMOS , 2009 .

[8]  Jun Wu,et al.  A Dual-Band GNSS RF Front End With a Pseudo-Differential LNA , 2011, IEEE Transactions on Circuits and Systems II: Express Briefs.

[9]  Wei Sun,et al.  A novel interference suppression scheme for global navigation satellite systems using antenna array , 2005, IEEE Journal on Selected Areas in Communications.

[10]  FRANK AMOROSO,et al.  Performance of the Adaptive A/D Converter in Combined CW and Gaussian Interference , 1984, MILCOM 1984 - IEEE Military Communications Conference.

[11]  David J. Allstot,et al.  A Current Reuse Quadrature GPS Receiver in 0.13 $\mu$m CMOS , 2010, IEEE Journal of Solid-State Circuits.

[12]  Frank Amoroso.  Adaptive A/D Converter to Suppress CW Interference in DSPN Spread Spectrum Communications , 1983, MILCOM 1983 - IEEE Military Communications Conference.

[13]  Frank Amoroso.  Adaptive A/D Converter to Suppress CW Interference in DSPN Spread-Spectrum Communications , 1983, IEEE Trans. Commun..

[14]  T. Krishnaswamy,et al.  A 90nm CMOS single-chip GPS receiver with 5dBm out-of-band IIP3 2.0dB NF , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[15]  T. Kadoyama,et al.  A complete single-chip GPS receiver with 1.6-V 24-mW radio in 0.18-/spl mu/m CMOS , 2003, 2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408).

[16]  Fabio Dovis,et al.  An Innovative Data Demodulation Technique for Galileo AltBOC Receivers , 2007 .

[17]  Mario Paparo,et al.  A 56-mW 23-mm2 single--chip 180-nm CMOS GPS receiver with 27.2-mW 4.1-mm2 radio , 2006 .

[18]  Jun-Gi Jo,et al.  A L1-band dual-mode RF receiver for GPS and Galileo in 0.18μm CMOS , 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

[19]  M. Conta,et al.  A 20 mW 3.24 ${\hbox {mm}}^{2}$ Fully Integrated GPS Radio for Location Based Services , 2007, IEEE Journal of Solid-State Circuits.

[20]  Jaeheon Lee,et al.  A 26mW dual-mode RF receiver for GPS/Galileo with L1/L1F and L5/E5a bands , 2008, 2008 International SoC Design Conference.

[21]  W. Rhee,et al.  Design of high-performance CMOS charge pumps in phase-locked loops , 1999, ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349).

[22]  Dongpo Chen,et al.  A frequency auto-tuning complex filter with 48dB gain tuning and 65dB DC-offset rejection , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

[23]  Kwyro Lee,et al.  A 19-mW 2.6-mm2 L1/L2 dual-band CMOS GPS receiver , 2005, IEEE J. Solid State Circuits.

[24]  Todd Walter,et al.  Compass-M1 Broadcast Codes in E2, E5b, and E6 Frequency Bands , 2009, IEEE Journal of Selected Topics in Signal Processing.

[25]  Chao Lu,et al.  Reconfigurable dual-channel tri-mode all-band RF receiver for next generation GNSS , 2010, 2010 IEEE Asian Solid-State Circuits Conference.

[26]  Kwyro Lee,et al.  A 19-mW 2.6-mm2 L1/L2 dual-band CMOS GPS receiver , 2005 .

[27]  鈴木 仁人,et al.  A Complete Single-Chip GPS Receiver with 1.6-V 24-mW Radio in 0.18-um CMOS(VLSI回路, デバイス技術(高速, 低電圧, 低電力)) , 2003 .

[28]  Jing Jin,et al.  A tri-mode Compass/GPS/Galileo RF receiver with all-digital automatic gain control loop , 2012 .