III–V FETs are being developed for potential application in 0.3–3 THz systems and VLSI. To increase bandwidth, we must increase the drive current I<inf>d</inf> = qn<inf>s</inf> v<inf>inj</inf>W<inf>g</inf> per unit gate width W<inf>g</inf>, requiring both high sheet carrier concentrations n<inf>s</inf> and high injection velocities v<inf>inj</inf>. Present III–V NFETs restrict control region transport to the single isotropic Γ band minimum. As the gate dielectric is thinned, I<inf>d</inf> becomes limited by the effective mass m*, and is only increased by using materials with increased m* and hence increased transit times.<sup>1</sup> The deep wavefunction also makes Γ -valley transport in low-m*materials unsuitable for < 22-nm gate length (L<inf>g</inf>) FETs. Yet, the L-valleys in many III–V materials<sup>2</sup> have very low transverse m<inf>t</inf> and very high longitudinal mass m<inf>1</inf>. L-valley bound state energies depend upon orientation, and the directions of confinement, growth, and transport can be chosen to selectively populate valleys having low mass in the transport direction<sup>3,4</sup>. The high perpendicular mass permits placement of multiple quantum wells spaced by a few nm, or population of multiple states of a thicker well spaced by ∼10–100 meV. Using combinations of Γ and L valleys, n<inf>s</inf> can be increased, m* kept low, and vertical confinement improved, key requirements for <20-nm L<inf>g</inf> III–V FETs.